Semiconductor memory devices are generally divided into volatile semiconductor memory devices such as dynamic random access memory (DRAM) devices or static random access memory (SRAM) devices, and non-volatile semiconductor memory devices such as flash memory devices or electrically erasable programmable read only memory (EEPROM) devices. The volatile semiconductor memory device loses data stored therein when power is off. However, the non-volatile semiconductor memory device keeps stored data even if power is out.
Among the non-volatile semiconductor memory devices, the flash memory device has been widely employed in various electronic apparatuses such as a digital camera, a cellular phone, an MP3 player, etc. Since a programming process and a reading process of the flash memory device take a relatively long time, technologies to manufacture a novel semiconductor memory device, for example, a magnetic random access memory (MRAM) device, a ferroelectric random access memory (FRAM) device or a phase-change random access memory (PRAM) device, have been constantly developed.
The phase-change memory device stores information using a resistance difference between an amorphous phase and a crystalline phase of a phase-change material layer composed of a chalcogenide compound, e.g., germanium-antimony-tellurium (GST). Particularly, the PRAM device may store data as states of “0” and “1” using a reversible phase transition of the phase-change material layer. The amorphous phase of the phase-change material layer has a large resistance, whereas the crystalline phase of the phase-change material layer has a relatively small resistance. In the PRAM device, a transistor formed on a substrate may provide the phase-change material layer with a reset current (Ireset) for changing the phase of the phase-change material layer from the crystalline state into the amorphous state. The transistor may also supply the phase-change material layer with a set current (Iset) for changing the phase of the phase-change material layer from the amorphous state into the crystalline state. The conventional PRAM device is disclosed in U.S. Pat. No. 6,987,467, Korean Patent No. 546,406 and Korean Laid-Open Patent Publication No. 2006-1105.
In the conventional PRAM device, however, the phase-change material layer may not have proper properties so that the PRAM device may not have desired electrical characteristics. For example, the phase-change material layer may be rapidly deteriorated, to thereby considerably reduce data retention characteristics of the PRAM device. Additionally, the PRAM device may have a relatively great ser resistance when the phase-change material layer includes a normal GST compound.
Considering the above-mentioned problems, a phase-change material layer has been formed using a chalcogenide compound doped into additional elements such as nitrogen in order to improve electrical characteristics of a PRAM device including the phase-change material layer. For example, Korean Laid-Open Patent Publication 2004-76225 discloses a phase-change memory device including a phase-change material layer composed of a GST compound doped with nitrogen. However, in the above-mentioned phase-change memory device having the phase-change material layer pattern of the GST compound doped with nitrogen, the phase-change memory device may have a considerably large initial writing current although a set resistance of the phase-change memory device may be decreased. To improve an integration degree of the phase-change memory device, a driving current of the phase-change memory device needs to be reduced. However, the set resistance of the phase-change memory device may be greatly increased in accordance with a reduction of the driving current thereof when the phase-change material layer pattern of the phase-change memory device includes the GST compound doped with nitrogen only. Further, the phase-change memory device of GST compound doped with nitrogen may not ensure good adhesion strength relative to the first electrode and the second electrode. Thus, the first electrode and/or the second electrode may be separated from the phase-change material layer pattern, and also an interface resistance between the first electrode and the phase-change material layer pattern or the second electrode and the phase-change material layer pattern may be undesirably reduced.
Meanwhile, Korean Laid-Open Patent Publication No. 2005-4137 discloses a sputtering target for forming a phase-change memory layer including a GST compound that contains nitrogen. However, the sputtering target includes carbon with a low content so that the phase-change memory layer may not have sufficient carbon content when the phase-change memory layer is formed using the sputtering target. As a result, the phase-change memory layer may not have desired thermal and electrical characteristics when the phase-change memory layer is employed in a phase-change memory device.